Introduction - Freescale Semiconductor MCF52277 Reference Manual

Chapter 25
Synchronous Serial Interface (SSI)
25.1

Introduction

This section presents the synchronous serial interface (SSI), and discusses the architecture, the
programming model, the operating modes, and initialization of the SSI module.
The SSI module, as shown in
registers and separate serial clock and frame sync generation for the transmit and receive sections. The
second set of Tx and Rx FIFOs replicates the logic used for the first set of FIFOs.
This device contains SSI bits to control the clock rate and the SSI DMA
request sources within the chip configuration module (CCM). See
Chapter 9, "Chip Configuration Module (CCM),"
on these bit fields.
Freescale Semiconductor
Figure 25-1, consists of separate transmit and receive circuits with FIFO
NOTE
MCF52277 Reference Manual, Rev. 1
for detailed information
25-1