Freescale Semiconductor MCF52277 Reference Manual page 298

Enhanced Direct Memory Access (eDMA)
f) Write longword to location 0x2008 → third iteration of the minor loop.
g) Read byte from location 0x100C, read byte from location 0x100D, read byte from 0x100E,
read byte from 0x100F.
h) Write longword to location 0x200C → last iteration of the minor loop.
6. eDMA engine writes: TCDn_SADDR = 0x1010, TCDn_DADDR = 0x2010, TCDn_CITER = 1.
7. eDMA engine writes: TCDn_CSR[ACTIVE] = 0.
8. The channel retires → one iteration of the major loop. The eDMA goes idle or services the next
channel.
9. Second hardware (eDMA peripheral) requests channel service.
10. The channel is selected by arbitration for servicing.
11. eDMA engine writes: TCDn_CSR[DONE] = 0, TCDn_CSR[START] = 0, TCDn_CSR[ACTIVE]
= 1.
12. eDMA engine reads: channel TCD data from local memory to internal register file.
13. The source to destination transfers are executed as follows:
a) Read byte from location 0x1010, read byte from location 0x1011, read byte from 0x1012, read
byte from 0x1013.
b) Write longword to location 0x2010 → first iteration of the minor loop.
c) Read byte from location 0x1014, read byte from location 0x1015, read byte from 0x1016, read
byte from 0x1017.
d) Write longword to location 0x2014 → second iteration of the minor loop.
e) Read byte from location 0x1018, read byte from location 0x1019, read byte from 0x101A, read
byte from 0x101B.
f) Write longword to location 0x2018 → third iteration of the minor loop.
g) Read byte from location 0x101C, read byte from location 0x101D, read byte from 0x101E,
read byte from 0x101F.
h) Write longword to location 0x201C → last iteration of the minor loop → major loop complete.
14. eDMA engine writes: TCDn_SADDR = 0x1000, TCDn_DADDR = 0x2000, TCDn_CITER = 2
(TCDn_BITER).
15. eDMA engine writes: TCDn_CSR[ACTIVE] = 0, TCDn_CSR[DONE] = 1, EDMA_INT[n] = 1.
16. The channel retires → major loop complete. The eDMA goes idle or services the next channel.
17.8.4.3 Modulo Feature
The modulo feature of the eDMA provides the ability to implement a circular data queue in which the size
of the queue is a power of 2. MOD is a 5-bit field for the source and destination in the TCD, and it specifies
which lower address bits increment from their original value after the address+offset calculation. All upper
address bits remain the same as in the original value. A setting of 0 for this field disables the modulo
feature.
Table 17-34 shows how the transfer addresses are specified based on the setting of the MOD field. Here a
circular buffer is created where the address wraps to the original value while the 28 upper address bits
17-34
MCF52277 Reference Manual, Rev. 1
Freescale Semiconductor