Freescale Semiconductor MCF52277 Reference Manual page 563

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PWMDTYn
0x00
(indicates no duty)
0x00
(indicates no duty)
≥ PWMPERn
≥ PWMPERn
1
Counter = 0x00 and does not count.
DSync
Revision
Version
Date
13 Apr 2004 E Southers
14 Apr 2004 E Southers
22 Apr 2004
11 May 2004 E Southers
10 May 2004 E Southers
11 May 2004 E Southers
Freescale Semiconductor
Table 24-16. PWM Boundary Cases
PWMPERn
>0x00
>0x00
XX
0x00
(indicates no period)
XX
0x00
(indicates no period)
Table 24-17. Revision History
Description of Changes
Author
• Converted block guide.
(EDS)
• Formatted registers & bit descriptions.
• Only 4 PWM channels for Tosca, 6 in
block guide.
• No emergency shutdown for Tosca.
• Removed redundant text in
(EDS)
programming model that is used in the
functional description section.
• Added equations using the equations
palette.
• Changed examples to use 75MHz clock
which is on Tosca.
• Need to simplify figures 18-13 & 18-14,
but good enough to put up for review.
C Smith
• Inserted index tags
(RCS)
• Made format edits to field description
tables.
(EDS)
• Changed references from "core clock" to
(EDS)
"internal bus clock"
• Added customer version of
• Added customer version of
(EDS)
MCF52277 Reference Manual, Rev. 1
PPOLn
1
0
1
1
1
0
XX
1
XX
0
Internal
Tosca Rev. 0
Figure 24-14
Figure 24-15
Pulse-Width Modulation (PWM) Module
PWMn Output
Always Low
Always High
Always High
Always Low
Always High
Always Low
Description of Changes
External
24-21

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