Table 245. R3 Response; Table 246. R4 Response; Table 247. R4B Response; R3 (Ocr Register) - ST STM32L4x6 Reference Manual

RM0351
41.5.4

R3 (OCR register)

Code length: 48 bits. The contents of the OCR register are sent as a response to CMD1.
The level coding is as follows: restricted voltage windows = low, card busy = low.
Bit position
47
46
[45:40]
[39:8]
[7:1]
0
41.5.5 R4 (Fast I/O)
Code length: 48 bits. The argument field contains the RCA of the addressed card, the
register address to be read out or written to, and its content.
47
46
[45:40]
[39:8] Argument field
[7:1]
0
41.5.6 R4b
For SD I/O only: an SDIO card receiving the CMD5 will respond with a unique SDIO
response R4. The format is:
47
46
[45:40]
Width (bits
1
1
6
32
7
1
Bit position
[31:16]
[15:8]
[7:0]
Bit position
DocID024597 Rev 3
SD/SDIO/MMC card host interface (SDMMC)

Table 245. R3 response

Value
0
0
'111111'
X
'1111111'
1

Table 246. R4 response

Width (bits
1 0
1 0
6 '100111'
16 X
8 X
8 X
7 X
1 1

Table 247. R4b response

Width (bits
1 0
1 0
6 X
Description
Start bit
Transmission bit
Reserved
OCR register
Reserved
End bit
Value Description
Start bit
Transmission bit
CMD39
RCA
register address
read register contents
CRC7
End bit
Value Description
Start bit
Transmission bit
Reserved
1431/1693
1450