Lpuart Main Features - ST STM32L4x6 Reference Manual

Low-power universal asynchronous receiver transmitter (LPUART)
37.2

LPUART main features

• Full-duplex asynchronous communications
•
NRZ standard format (mark/space)
• Programmable baud rate from 300 baud/s to 9600 baud/s using a 32.768 kHz clock
source. Higher baud rates can be achieved by using a higher frequency clock source
•
Dual clock domain allowing
–
–
•
Programmable data word length (7 or 8 or 9 bits)
•
Programmable data order with MSB-first or LSB-first shifting
•
Configurable stop bits (1 or 2 stop bits)
•
Single-wire half-duplex communications
• Continuous communications using DMA
•
Received/transmitted bytes are buffered in reserved SRAM using centralized DMA.
• Separate enable bits for transmitter and receiver
•
Separate signal polarity control for transmission and reception
• Swappable Tx/Rx pin configuration
•
Hardware flow control for modem and RS-485 transceiver
• Transfer detection flags:
–
–
–
• Parity control:
–
–
•
Four error detection flags:
–
–
–
–
•
Fourteen interrupt sources with flags
•
Multiprocessor communications
The LPUART enters mute mode if the address does not match.
•
Wakeup from mute mode (by idle line detection or address mark detection)
37.3 LPUART implementation
The STM32L4x6 devices embed one LPUART. Refer to
implementation
1246/1693
UART functionality and wakeup from Stop mode
Convenient baud rate programming independent from the PCLK reprogramming
Receive buffer full
Transmit buffer empty
Busy and end of transmission flags
Transmits parity bit
Checks parity of received data byte
Overrun error
Noise detection
Frame error
Parity error
for LPUART supported features.
DocID024597 Rev 3
Section 36.4: USART
RM0351