RM0351
38.6.8
SPI register map
Table 207
Offset
Register
SPIx_CR1
0x00
Reset value
SPIx_CR2
0x04
Reset value
SPIx_SR
0x08
Reset value
SPIx_DR
0x0C
Reset value
SPIx_CRCPR
0x10
Reset value
SPIx_RXCRCR
0x14
Reset value
SPIx_TXCRCR
0x18
Reset value
Refer to
shows the SPI register map and reset values.
Table 207. SPI register map and reset values
Section 2.2.2 on page 67
0
0
0
0
0
for the register boundary addresses.
DocID024597 Rev 3
Serial peripheral interface (SPI)
0
0
0
0
0
0
0
0
0
DS[3:0]
0
0
0
0
1
1
1
0
0
0
0
0
0
0
0
0
DR[15:0]
0
0
0
0
0
0
0
0
0
CRCPOLY[15:0]
0
0
0
0
0
0
0
0
0
RxCRC[15:0]
0
0
0
0
0
0
0
0
0
TxCRC[15:0]
0
0
0
0
0
0
0
0
0
BR [2:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
1317/1685
1317
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