Figure 444. Example Of Typical Ac'97 Configuration On Devices Featuring At Least; Embedded Sais (Three External Ac'97 Decoders) - ST STM32L4x6 Reference Manual

RM0351 Serial audio interface (SAI)

Figure 444. Example of typical AC'97 configuration on devices featuring at least

2 embedded SAIs (three external AC'97 decoders)

In receiver mode, the SAI acting as an AC'97 link controller requires no FIFO request and so
no data storage in the FIFO when the Codec ready bit in the slot 0 is decoded low. If bit
CNRDYIE is enabled in the SAI_xIM register, flag CNRDY will be set in the SAI_xSR
register and an interrupt is generated. This flag is dedicated to the AC'97 protocol.
Clock generator programming in AC'97 mode
In AC'97 mode, the frame length is fixed at 256 bits, and its frequency shall be set to 48 kHz.
The formulas given in Section 39.3.7: SAI clock generator shall be used with FRL = 255,
order to generate the proper frame rate (F .
FS_x)
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