RM0351
Corrupted EOF reception
Once an SOF has been received, the SWPMI accumulates the received bytes until the
reception of an EOF (ignoring any possible SOF). Once an EOF has been received, the
SWPMI is ready to start a new frame reception and waits for an SOF.
In case of a corrupted EOF, RXBERF and RXBFF flags will bet set in the SWPMI_ISR
register after the next EOF reception.
Note:
In case of a corrupted EOF reception, the payload reception carries on, thus the number of
bytes in the payload might get the value 31 if the number of received bytes is greater than
30. The number of bytes in the payload is read in the SWPMI_RFL register or in bits [23:16]
of the 8th word of the buffer in the RAM memory, depending on the operating mode.
40.3.10
Loopback mode
The loopback mode can be used for test purposes. The user must set LPBK bit in the
SWPMI_CR register in order to enable the loopback mode.
When the loopback mode is enabled, SWPMI_TX and SWPMI_RX signals are connected
together. As a consequence, all frames sent by the SWPMI will be received back.
40.4
SWPMI low-power modes
Mode
Sleep
Low-power run
Low-power sleep
Stop 0 / Stop 1
Stop 2
Standby
Shutdown
40.5
SWPMI interrupts
All SWPMI interrupts are connected to the NVIC.
To enable the SWPMI interrupt, the following sequence is required:
1.
Configure and enable the SWPMI interrupt channel in the NVIC
2.
Configure the SWPMI to generate SWPMI interrupts (refer to the SWPMI_IER
register).
Table 215. Effect of low-power modes on SWPMI
No effect. SWPMI interrupts cause the device to exit the Sleep mode.
No effect.
No effect. SWPMI interrupts cause the device to exit the Low-power sleep
mode.
SWPMI registers content is kept. A RESUME from SUSPENDED mode issued
by the slave can wake up the device from Stop 0 and Stop 1 modes if the
SWPCLK is HSI16 (refer to
SWPMI registers content is kept. SWPMI must be disabled before entering
Stop 2.
The SWPMI peripheral is powered down and must be reinitialized after exiting
Standby or Shutdown mode.
DocID024597 Rev 3
Single Wire Protocol Master Interface (SWPMI)
Description
Section 40.3.1: SWPMI block
diagram).
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