Figure 457. Swpmi No Software Buffer Mode Transmission - ST STM32L4x6 Reference Manual

RM0351
Note: The low significant byte of the first 32-bit word written into the SWPMI_TDR register is
coding the number of data bytes in the payload. This number could be from 1 to 30. Any
other value in the low significant byte will be ignored and the transmission will not start.
Writing to the SWPMI_TDR register will induce the following actions:
•
Send the transition sequence and 8 idle bits (RESUME by master) if the SWP bus state
is SUPENDED (this will not happen if the SWP bus state is already ACTIVATED),
• Send a Start of frame (SOF),
•
Send the payload according to the SWPMI_TRD register content. If the number of
bytes in the payload is greater than 3, the SWPMI_TDR needs to be refilled by
software, each time the TXE flag in the SWPMI_ISR register is set, and as long as the
TXBEF flag is not set in the SWPMI_ISR register,
•
Send the 16-bit CRC, automatically calculated by the SWPMI core,
• Send an End of frame (EOF).
The TXE flag is cleared automatically when the software is writing to the SWPMI_TDR
register.
Once the complete frame is sent, provided that no other frame transmission has been
requested (i.e. SWPMI_TDR has not been written again after the TXBEF flag setting), TCF
and SUSP flags are set in the SWPMI_ISR register 7 idle bits after the EOF transmission,
and an interrupt is generated if TCIE bit is set in the SWPMI_IER register (refer to
Figure 457: SWPMI No software buffer mode
If another frame transmission is requested before the end of the EOF transmission, the TCF
flag is not set and the frame will be consecutive to the previous one, with only one idle bit in
between (refer to
frames).

Figure 457. SWPMI No software buffer mode transmission

Figure 458: SWPMI No software buffer mode transmission, consecutive
DocID024597 Rev 3
Single Wire Protocol Master Interface (SWPMI)
transmission).
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