Table 203. Lpuart Interrupt Requests; Lpuart Interrupts - ST STM32L4x6 Reference Manual

Low-power universal asynchronous receiver transmitter (LPUART)
Stop 0, Stop 1 and Stop 2
Standby
Shutdown
37.6

LPUART interrupts

Transmit data register empty
CTS interrupt
Transmission Complete
Receive data register not empty (data ready to be read)
Overrun error detected
Idle line detected
Parity error
Noise Flag, Overrun error and Framing Error in multibuffer
communication.
Character match
Wakeup from Stop mode
1. The wUF interrupt is active only in Stop mode.
The LPUART interrupt events are connected to the same interrupt vector (see
•
During transmission: Transmission Complete, Clear to Send, Transmit data Register
empty or Framing error interrupt.
• During reception: Idle Line detection, Overrun error, Receive data register not empty,
Parity error, Noise Flag, Framing Error, Character match, etc.
These events generate an interrupt if the corresponding Enable Control Bit is set.
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Table 202. Effect of low-power modes on the LPUART (continued)
Mode
The LPUART registers content is kept. The LPUART is able to wake up
the MCU from Stop 0, Stop 1 and Stop 2 modes when the UESM bit is set
and the LPUART clock is set to HSI16 or LSE.
The MCU wakeup from Stop 0, Stop 1 and 2 modes can be done using
either the standard RXNE or the WUF interrupt.
The LPUART is powered down and must be reinitialized when the device
has exited from Standby or Shutdown mode.

Table 203. LPUART interrupt requests

Interrupt event
DocID024597 Rev 3
Description
Event flag
TXE
CTSIF
TC
RXNE
ORE
IDLE
PE
NF or ORE or FE
CMF
(1)
WUF
RM0351
Enable
Control bit
TXEIE
CTSIE
TCIE
RXNEIE
IDLEIE
PEIE
EIE
CMIE
WUFIE
Figure 407).