Table 214. Sai Register Map And Reset Values; Data Register (Sai_Adr / Sai_Bdr) - ST STM32L4x6 Reference Manual

RM0351
39.5.9

Data register (SAI_ADR / SAI_BDR)

Address offset: block A: 0x020
Address offset: block B: 0x040
Reset value: 0x0000 0000
31 30 29
rw rw rw
15 14 13
rw rw rw
Bits 31:0 DATA[31:0]: Data
A write to this register loads the FIFO provided the FIFO is not full.
A read from this register empties the FIFO if the FIFO is not empty.
39.5.10 SAI register map
The following table summarizes the SAI registers.
Register
Offset and reset
value
SAI_GCR
0x0000
Reset value
0x0004
SAI_xCR1
or
0x0024
Reset value
SAI_xCR2
0x0008 or
0x0028
Reset value
SAI_xFRCR
0x000C or
0x002C
Reset value
28 27 26 25
rw rw rw rw
12 11 10 9
rw rw rw rw

Table 214. SAI register map and reset values

DocID024597 Rev 3
24 23 22 21
DATA[31:16]
rw rw rw rw
8 7 6
DATA[15:0]
rw rw rw rw
0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0
Serial audio interface (SAI)
20 19 18
rw rw rw
5 4 3 2
rw rw rw
0 0 0 0 0 0 0 1 0
MUTECN[5:0]
FSALL[6:0]
0 0 0 0 0 0 0 0 0 0 0 0 1 1 1
17 16
rw rw
1 0
rw rw
0 0 0 0
0 0 0 0
FRL[7:0]
1361/1693
1362