ST STM32L4x6 Reference Manual page 1255

RM0351
Overrun error
An overrun error occurs when a character is received when RXNE has not been reset. Data
can not be transferred from the shift register to the RDR register until the RXNE bit is
cleared.
The RXNE flag is set after every byte received. An overrun error occurs if RXNE flag is set
when the next data is received or the previous DMA request has not been serviced. When
an overrun error occurs:
•
The ORE bit is set.
•
The RDR content will not be lost. The previous data is available when a read to
LPUART_RDR is performed.
•
The shift register will be overwritten. After that point, any data received during overrun
is lost.
•
An interrupt is generated if either the RXNEIE bit is set or EIE bit is set.
• The ORE bit is reset by setting the ORECF bit in the ICR register.
Note: The ORE bit, when set, indicates that at least 1 data has been lost. There are two
possibilities:
- if RXNE=1, then the last valid data is stored in the receive register RDR and can be read,
- if RXNE=0, then it means that the last valid data has already been read and thus there is
nothing to be read in the RDR. This case can occur when the last valid data is read in the
RDR at the same time as the new (and lost) data is received.
Selecting the clock source
The choice of the clock source is done through the Reset and Clock Control system (RCC).
The clock source must be chosen before enabling the LPUART (by setting the UE bit).
The choice of the clock source must be done according to two criteria:
•
Possible use of the LPUART in low-power mode
•
Communication speed.
The clock source frequency is f
When the dual clock domain and the wakeup from Stop mode features are supported, the
clock source can be one of the following sources: f
Otherwise, the LPUART clock source is f
Choosing f
in low-power mode. Depending on the received data and wakeup mode selection, the
LPUART wakes up the MCU, when needed, in order to transfer the received data by
software reading the LPUART_RDR register or by DMA.
For the other clock sources, the system must be active in order to allow LPUART
communication.
The communication speed range (specially the maximum communication speed) is also
determined by the clock source.
The receiver samples each incoming baud as close as possible to the middle of the baud-
period. Only a single sample is taken of each of the incoming bauds.
Note: There is no noise detection for data.
Low-power universal asynchronous receiver transmitter (LPUART)
CK
, f as clock source may allow the LPUART to receive data while the MCU is
LSE HSI
DocID024597 Rev 3
.
PCLK
PCLK .
(default), f , f or f
LSE HSI
.
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