Sdio Read Wait Operation By Stopping Sdmmc_Ck - ST STM32L4x6 Reference Manual

SD/SDIO/MMC card host interface (SDMMC)
41.6.2

SDIO read wait operation by stopping SDMMC_CK

If the SDIO card does not support the previous read wait method, the SDMMC can perform
a read wait by stopping SDMMC_CK (SDMMC_DCTRL is set just like in the method
presented in
SDMMC_CK cycles after the end bit of the current received block and starts the clock again
after the read wait start bit is set.
As SDMMC_CK is stopped, any command can be issued to the card. During a read/wait
interval, the SDMMC can detect SDIO interrupts on SDMMC_D1.
41.6.3 SDIO suspend/resume operation
While sending data to the card, the SDMMC can suspend the write operation. the
SDMMC_CMD[11] bit is set and indicates to the CPSM that the current command is a
suspend command. The CPSM analyzes the response and when the ACK is received from
the card (suspend accepted), it acknowledges the DPSM that goes Idle after receiving the
CRC token of the current block.
The hardware does not save the number of the remaining block to be sent to complete the
suspended operation (resume).
The write operation can be suspended by software, just by disabling the DPSM
(SDMMC_DCTRL[0] =0) when the ACK of the suspend command is received from the card.
The DPSM enters then the Idle state.
To suspend a read: the DPSM waits in the Wait_r state as the function to be suspended
sends a complete packet just before stopping the data transaction. The application
continues reading RxFIFO until the FIF0 is empty, and the DPSM goes Idle automatically.
41.6.4 SDIO interrupts
SDIO interrupts are detected on the SDMMC_D1 line once the SDMMC_DCTRL[11] bit is
set.
When SDIO interrupt is detected, SDMMC_STA[22] (SDIOIT) bit is set. This static bit can be
cleared with clear bit SDMMC_ICR[22] (SDIOITC). An interrupt can be generated when
SDIOIT status bit is set. Separated interrupt enable SDMMC_MASK[22] bit (SDIOITE) is
available to enable and disable interrupt request.
When SD card interrupt occurs (SDMMC_STA[22] bit set), host software follows below
steps to handle it.
1. Disable SDIOIT interrupt signaling by clearing SDIOITE bit (SDMMC_MASK[22] = '0'),
2. Serve card interrupt request, and clear the source of interrupt on the SD card,
3. Clear SDIOIT bit by writing '1' to SDIOITC bit (SDMMC_ICR[22] = '1'),
4. Enable SDIOIT interrupt signaling by writing '1' to SDIOITE bit (SDMMC_MASK[22] =
'1').
Steps 2 to 4can be executed out of the SDIO interrupt service routine.
41.7 HW flow control
The HW flow control functionality is used to avoid FIFO underrun (TX mode) and overrun
(RX mode) errors.
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Section 41.6.1, but SDMMC_DCTRL[10] =1): DSPM stops the clock two
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