Swpmi Interrupt And Status Register (Swpmi_Isr) - ST STM32L4x6 Reference Manual

Single Wire Protocol Master Interface (SWPMI)
40.6.3

SWPMI Interrupt and Status register (SWPMI_ISR)

Address offset: 0x0C
Reset value: 0x0000 02C2
31 30 29 28
Res. Res. Res. Res.
15 14 13 12
Res. Res. Res. Res.
Bits 31:11 Reserved, must be kept at reset value
Bit 10 DEACTF: DEACTIVATED flag
Bit 9 SUSP: SUSPEND flag
Bit 8 SRF: Slave resume flag
Bit 7 TCF: Transfer complete flag
Bit 6 TXE: Transmit data register empty
Bit 5 RXNE: Receive data register not empty
1384/1685
27 26 25
Res. Res. Res.
11 10 9
DEACT
Res. SUSP
F
r r
This bit is a status flag, acknowledging the request to enter the DEACTIVATED mode.
0: SWP bus is in ACTIVATED or SUSPENDED state
1: SWP bus is in DEACTIVATED state
If a RESUME by slave state is detected by the SWPMI while DEACT bit is set by software,
the SRF flag will be set, DEACTF will not be set and SWP will move in ACTIVATED state.
This bit is a status flag, reporting the SWP bus state
0: SWP bus is in ACTIVATED state
1: SWP bus is in SUSPENDED or DEACTIVATED state
This bit is set by hardware to indicate a RESUME by slave detection. It is cleared by software,
writing 1 to CSRF bit in the SWPMI_ICR register.
0: No Resume by slave state detected
1: A Resume by slave state has been detected during the SWP bus SUSPENDED state
This flag is set by hardware as soon as both transmission and reception are completed and
SWP is switched to the SUSPENDED state. It is cleared by software, writing 1 to CTCF bit in
the SWPMI_ICR register.
0: Transmission or reception is not completed
1: Both transmission and reception are completed and SWP is switched to the SUSPENDED
state
This flag indicates the transmit data register status
0: Data written in transmit data register SWPMI_TDR is not transmitted yet
1: Data written in transmit data register SWPMI_TDR has been transmitted and
SWPMI_TDR can be written to again
This flag indicates the receive data register status
0: Data is not received in the SWPMI_RDR register
1: Received data is ready to be read in the SWPMI_RDR register
24 23 22
Res. Res. Res.
8 7 6
SRF TCF TXE
r r r
DocID024597 Rev 3
21 20 19 18
Res. Res. Res. Res.
5 4 3
TXUNR RXOVR RXBER
RXNE
F F
r r r
RM0351
17 16
Res. Res.
2 1 0
TXBEF RXBFF
F
r r r