Memory Organization; Introduction - ST STM32WL55JC Reference Manual

The table below details the boundary addresses of peripherals available in the device.
Table 4. Memory map and peripheral register boundary addresses
Bus Boundary address
0x5801 0400 - 0x5801 FFFF
APB3
0x5801 0000 - 0x5801 03FF
0x5800 40C0 - 0x5800 FFFF
0x5800 4800 - 0x5800 4BFF
0x5800 4400 - 0x5800 47FF
0x5800 4000 - 0x5800 43FF
0x5800 3400 - 0x5800 3FFF
0x5800 2400 - 0x5800 33FF
0x5800 2000 - 0x5800 23FF
0x5800 1C00 - 0x5800 1FFF
AHB3
0x5800 1800 - 0x5800 1BFF
0x5800 1400 - 0x5800 17FF
0x5800 1000 - 0x5800 13FF
0x5800 0C00 - 0x5800 0FFF
0x5800 0800 - 0x5800 0BFF
0x5800 0400 - 0x5800 07FF
0x5800 0000 - 0x5800 03FF
0x4800 2000 - 0x57FF FFFF
0x4800 1C00 - 0x4800 1FFF
0x4800 0C00 - 0x4800 1BFF
AHB2
0x4800 0800 - 0x4800 0BFF
0x4800 0400 - 0x4800 07FF
0x4800 0000 - 0x4800 03FF
72/1454
Size
Peripheral
(bytes)
- Reserved
1 K SUBGHZSPI
- Reserved
1 K GTZC_TZIC
1 K GTZC_TZSC
1 K FLASH
PKA continue
8 K PKA RAM
PKA
- Reserved
1 K AES
1 K HSEM
1 K True RNG
1 K IPCC
1 K EXTI
1 K PWR
1 K RCC
- Reserved
8 K GPIO
RM0453 Rev 2
Peripheral register map
-
Section 37.9.10: SPI/I2S register map
-
Section 3.6.4: GTZC TZIC register map
Section 3.5.8: GTZC TZSC register map
Section 4.10.21: FLASH register map
Section 24.7.5: PKA register map
-
Section 23.7.18: AES register map
Section 8.4.9: HSEM register map
Section 22.7.5: RNG register map
Section 9.4.9: IPCC register map
Section 16.6.13: EXTI register map
Section 6.6.23: PWR register map
Section 7.4.47: RCC register map
-
Section 10.4.36: GPIOH register map
Reserved
Section 10.4.35: GPIOC register map
Section 10.4.34: GPIOB register map
Section 10.4.33: GPIOA register map
RM0453