Basic Sequence For Bpsk Transmit Operation; Sub-Ghz Radio Registers; Sub-Ghz Radio Ramp-Up Msb Register (Subghz_Ram_Rampuph) - ST STM32WL55JC Reference Manual

Sub-GHz radio (SUBGHZ)
Bits 7:0 WHITEINI[7:0]: Generic packet whitening initial value LSB bits [7:0]
5.10.4 Sub-GHz radio generic CRC initial MSB register
(SUBGHZ_GCRCINIRH)
Address offset: 0x06BC
Reset value: 0x1D
7 6
rw rw
Bits 7:0 CRCINI[15:8]: Generic packet CRC initial polynomial MSB bits [15:8]
5.10.5 Sub-GHz radio generic CRC initial LSB register
(SUBGHZ_GCRCINIRL)
Address offset: 0x06BD
Reset value: 0x0F
7 6
rw rw
Bits 7:0 CRCINI[7:0]: Generic packet CRC initial polynomial LSB bits [7:0]
5.10.6 Sub-GHz radio generic CRC polynomial MSB register
(SUBGHZ_GCRCPOLRH)
Address offset: 0x06BE
Reset value: 0x10
7 6
rw rw
Bits 7:0 CRCPOL[15:8]: Generic packet CRC polynomial MSB bits [15:8]
208/1454
5
rw
These bits are used for CRC initialization.
5
rw
These bits are used for CRC initialization.
5
rw
These bits are used for CRC initialization.
4 3
CRCINI[15:8]
rw rw
4 3
CRCINI[7:0]
rw rw
4 3
CRCPOL[15:8]
rw rw
RM0453 Rev 2
2 1
rw rw
2 1
rw rw
2 1
rw rw
RM0453
0
rw
0
rw
0
rw