Table 181. Tim1 Register Map And Reset Values - ST STM32WL55JC Reference Manual

Advanced-control timer (TIM1)
Table 181. TIM1 register map and reset values (continued)
Register
Offset
name
TIM1_CCMR3
Output
0x54
Compare mode
Reset value
TIM1_CCR5
0x58
Reset value 0
TIM1_CCR6
0x5C
Reset value
TIM1_AF1
0x60
Reset value
TIM1_AF2
0x64
Reset value
TIM1_TISEL
0x68
Reset value
Refer to
822/1454
0
0 0
TI4SEL[3:0]
0 0 0 0
Section 2.6 on page 70
OC6M
0 0 0
0 0
0 0
Res
ETRSEL
[3:0]
0 0 0 0
TI3SEL[3:0]
0 0 0 0
for the register boundary addresses.
RM0453 Rev 2
OC5M
[2:0] [2:0]
0 0 0 0 0 0
CCR5[15:0]
0 0 0 0 0 0 0 0
CCR6[15:0]
0 0 0 0 0 0 0 0
0 0 0
0 0 0
TI2SEL[3:0]
0 0 0 0
RM0453
0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
0 0 1
0 0 1
TI1SEL[3:0]
0 0 0 0