ST STM32WL55JC Reference Manual page 454

Direct memory access controller (DMA)
13.3 DMA implementation
13.3.1 DMA1 and DMA2
DMA1 and DMA2 are implemented with the hardware configuration parameters shown
in Table 77.
Number of channels
Security
13.3.2 DMA request mapping
The DMA controller is connected to DMA requests from the AHB/APB peripherals through
the DMAMUX peripheral.
For the mapping of the different requests, refer to the
implementation.
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Table 77. DMA1 and DMA2 implementation
Feature
RM0453 Rev 2
DMA1
7
1 (supported)
Section 14.3: DMAMUX
RM0453
DMA2
7
1 (supported)