Sub-Ghz Radio Frame Limit Lsb Register (Subghz_Ram_Frameliml); Sub-Ghz Radio Generic Bit Synchronization Register (Subghz_Gbsyncr); Sub-Ghz Radio Generic Cfo Msb Register (Subghz_Gcforh) - ST STM32WL55JC Reference Manual

Sub-GHz radio (SUBGHZ)
Bits 7:0 SYNCWORD[47:40]: Sixth byte of generic packet synchronization word
5.10.11 Sub-GHz radio generic synchronization word control register 4
(SUBGHZ_GSYNCR4)
Address offset: 0x06C3
Reset value: 0x25
7 6
rw rw
Bits 7:0 SYNCWORD[39:32]: Fifth byte of generic packet synchronization word
5.10.12 Sub-GHz radio generic synchronization word control register 3
(SUBGHZ_GSYNCR3)
Address offset: 0x06C4
Reset value: 0x56
7 6
rw rw
Bits 7:0 SYNCWORD[31:24] Fourth byte of generic packet synchronization word
5.10.13 Sub-GHz radio generic synchronization word control register 2
(SUBGHZ_GSYNCR2)
Address offset: 0x06C5
Reset value: 0x53
7 6
rw rw
Bits 7:0 SYNCWORD[23:16]: Third byte of generic packet synchronization word
5.10.14 Sub-GHz radio generic synchronization word control register 1
(SUBGHZ_GSYNCR1)
Address offset: 0x06C6
Reset value: 0x65
7 6
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210/1454
5 4
SYNCWORD[39:32]
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5 4
SYNCWORD[31:24]
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5 4
SYNCWORD[23:16]
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5 4
SYNCWORD[15:8]
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RM0453 Rev 2
3 2
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3 2
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3 2
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3 2
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RM0453
1 0
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1 0
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1 0
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1 0
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