ST STM32WL55JC Reference Manual page 362

Advanced arm-based 32-bit mcus with sub-ghz radio solution
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Reset and clock control (RCC)
Off-
Register
set
RCC_C2
AHB1SMENR
0x168
Reset value
RCC_C2
AHB2SMENR
0x16C
Reset value
RCC_C2
AHB3SMENR
0x170
Reset value
0x174
Reserved
RCC_C2
APB1
0x178
SMENR1
1
Reset value
RCC_C2
APB1
0x17C
SMENR2
Reset value
RCC_C2
APB2SMENR
0x180
Reset value
362/1454
Table 63. RCC register map and reset values (continued)
1 1 1
1
1 1 1
1 1 1
Reserved
1
1
1 1
1
RM0453 Rev 2
1
1
1
1 1
1 1
1
RM0453
1 1 1
1 1 1
1
1

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