Table 70. Port Bit Configurations; Figure 44. Basic Structure Of A 5V-Tolerant I/O Port Bit - ST STM32WL55JC Reference Manual

Advanced arm-based 32-bit mcus with sub-ghz radio solution
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RM0453
Bits 31:30 OSPEED15[1:0]: Port Px15 output speed configuration
Bits 29:28 OSPEED14[1:0]: Port Px14 output speed configuration
Bits 27:26 OSPEED13[1:0]: Port Px13 output speed configuration
Bits 25:24 OSPEED12[1:0]: Port Px12 output speed configuration
Bits 23:22 OSPEED11[1:0]: Port Px11 output speed configuration
Bits 21:20 OSPEED10[1:0]: Port Px10 output speed configuration
Bits 19:18 OSPEED9[1:0]: Port Px9 output speed configuration
Bits 17:16 OSPEED8[1:0]: Port Px8 output speed configuration
Bits 15:14 OSPEED7[1:0]: Port Px7 output speed configuration
Bits 13:12 OSPEED6[1:0]: Port Px6 output speed configuration
Bits 11:10 OSPEED5[1:0]: Port Px5 output speed configuration
Bits 9:8 OSPEED4[1:0]: Port Px4 output speed configuration
Bits 7:6 OSPEED3[1:0]: Port Px3 output speed configuration
Bits 5:4 OSPEED2[1:0]: Port Px2 output speed configuration
Bits 3:2 OSPEED1[1:0]: Port Px1 output speed configuration
Bits 1:0 OSPEED0[1:0]: Port Px0 output speed configuration
Note: Refer to the device datasheet for the frequency specifications and the power supply
10.4.4
GPIOx pull-up/pull-down register (GPIOx_PUPDR) (x = A to B)
Address offset: Block A: 0x000C
Address offset: Block B: 0x040C
Reset value: Block A: 0x6400 0000
Reset value: Block B: 0x0000 0100
31
30
29
28
PUPD15[1:0]
PUPD14[1:0]
rw
rw
rw
rw
15
14
13
12
PUPD7[1:0]
PUPD6[1:0]
rw
rw
rw
rw
Bits 31:30 PUPD15[1:0]: Port Px15 pull configuration
Bits 29:28 PUPD14[1:0]: Port Px14 pull configuration
Bits 27:26 PUPD13[1:0]: Port Px13 pull configuration
Bits 25:24 PUPD12[1:0]: Port Px12 pull configuration
These bits are written by software to configure the I/O output speed.
00: Low speed
01: Medium speed
10: Fast speed
11: High speed
and load conditions for each speed.
27
26
25
PUPD13[1:0]
PUPD12[1:0]
rw
rw
rw
11
10
9
PUPD5[1:0]
PUPD4[1:0]
rw
rw
rw
24
23
22
PUPD11[1:0]
PUPD10[1:0]
rw
rw
rw
8
7
6
PUPD3[1:0]
rw
rw
rw
RM0453 Rev 2
General-purpose I/Os (GPIO)
21
20
19
18
PUPD9[1:0]
rw
rw
rw
rw
5
4
3
2
PUPD2[1:0]
PUPD1[1:0]
rw
rw
rw
rw
17
16
PUPD8[1:0]
rw
rw
1
0
PUPD0[1:0]
rw
rw
403/1454
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