Figure 84. Temperature Sensor And Vrefint Channel Block Diagram - ST STM32WL55JC Reference Manual

RM0453
the correct operation of the ADC, the VBAT pin is internally connected to a bridge divider.
This bridge is automatically enabled when VBATEN is set, to connect V
V [14] input channel. As a consequence, the converted digital value is half the V
IN
voltage. To prevent any unwanted consumption on the battery, it is recommended to enable
the bridge divider only when needed for ADC conversion.
18.11 ADC interrupts
An interrupt can be generated by any of the following events:
•
End Of Calibration (EOCAL flag)
•
ADC power-up, when the ADC is ready (ADRDY flag)
• End of any conversion (EOC flag)
•
End of a sequence of conversions (EOS flag)
• When an analog watchdog detection occurs (AWD1, AWD2, AWD3 flags)
•
When the Channel configuration is ready (CCRDY flag)
• When the end of sampling phase occurs (EOSMP flag)
•
when a data overrun occurs (OVR flag)
Separate interrupt enable bits are available for flexibility.
End Of Calibration
ADC ready
End of conversion
End of sequence of conversions
Analog watchdog 1 status bit is set
Figure 85. V
V
VBATEN control bit
BAT
V /3
BAT
+
-
Table 109. ADC interrupts
Interrupt event
channel block diagram
BAT
ADC V
RM0453 Rev 2
Analog-to-digital converter (ADC)
to the ADC
BAT
ADC
[14]
IN
Event flag Enable control bit
EOCAL
ADRDY ADRDYIE
EOC
EOS
AWD1
BAT
MSv45367V2
EOCALIE
EOCIE
EOSIE
AWD1IE
567/1454
591