ST STM32WL55JC Reference Manual page 356

Reset and clock control (RCC)
7.4.47 RCC register map
The following table gives the RCC register map and the reset values.
Off-
Register
set
RCC_CR
0x000
Reset value
RCC_ICSCR
0x004
Reset value
RCC_CFGR
0x008
Reset value
RCC_
PLLCFGR
0x00C
0 0 1 0 0 0 1 0
Reset value
0x010
to Reserved
0x014
RCC_CIER
0x018
Reset value
RCC_CIFR
0x01C
Reset value
RCC_CICR
0x020
Reset value
0x024 Reserved
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Table 63. RCC register map and reset values
0 0
HSITRIM[6:0]
1 0 0 0 0 0 0 x x x x x x x x 0 0 0 0 0 0 0 0 x x x x x x x x
0 0 0 0 0 0 0
0 0 0 0 0
HSICAL[7:0]
1 1 1 0
PLLP[4:0]
0 0 0 1 0 0 0 0 0 0 0 0 1
Reserved
Reserved
RM0453 Rev 2
0 0 0 0 0 0 1 1 0 0 0 0 1
MSITRIM[7:0]
0 0 0 0 0 0 0 0 0 0 0 0 0 0
PLLN[6:0]
0 0 0
0
0 0
0 0
RM0453
MSICAL[7:0]
0 0
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0