Flash Access Control Register 2 (Flash_Acr2) - ST STM32WL55JC Reference Manual

RM0453
Bits 31:0 OPTKEY[31:0]: Option byte key lower bits
4.10.5 FLASH status register (FLASH_SR)
Address offset: 0x010
Reset value: 0x000X 0000
31 30 29
Res. Res. Res. Res.
15 14 13
OPTNV Res.
rc_w1 rc_w1 r
Bits 31:20 Reserved, must be kept at reset value.
Bit 19 PESD: Program/erase operation suspended
Bit 18 CFGBSY: Program or erase configuration busy
Bit 17 Reserved, must be kept at reset value.
Bit 16 BSY: Busy
Bit 15 OPTVERR: Option and engineering bits loading validity error
The following values must be written consecutively to unlock the Flash memory option
registers, enabling option byte programming/erasing operations:
KEY1: 0x0819 2A3B
KEY2: 0x4C5D 6E7F
28 27 26 25
Res. Res. Res.
12 11 10 9
Res. Res.
rc_w1
This bit is set and reset by hardware.
Set when at least one PES bit in FLASH_ACR or FLASH_C2ACR is set.
Cleared when both PES bits in FLASH_ACR and FLASH_C2ACR are cleared.
When set, new program or erase operations are not started.
This bit is set and reset by hardware (set when first word is sent and reset when program
operation completes or is interrupted by an error).
When set, the program and erase settings in PG, PNB[6:0], PER, and MER bits in
FLASH_CR are used (busy) and cannot be changed (a programming or erase operation is
ongoing).
When reset, the program and erase settings in PG, PNB[6:0], PER, and MER bits in
FLASH_CR can be modified.
This bit indicates that a Flash operation requested in FLASH_CR is in progress. This bit is
set at the beginning of a Flash operation and reset when the operation finishes or when an
error occurs.
Set by hardware when the options and engineering bits read may not be the one configured
by the user or production. If options and engineering bits are not properly loaded, OPTVERR
is set again after each system reset. Option bytes that fail loading are forced to a safe value
(see Section 4.4.2: Option bytes
This bit is cleared by writing 1.
24 23 22 21
Res. Res. Res. Res.
8 7 6
rc_w1 rc_w1 rc_w1 rc_w1
programming).
RM0453 Rev 2
Embedded Flash memory (FLASH)
20 19 18
Res. PESD CFGBSY
r r
5 4 3 2
Res.
rc_w1 rc_w1
17 16
Res. BSY
r
1 0
EOP
rc_w1 rc_w1
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