ST STM32WL55JC Reference Manual page 413

RM0453
10.4.18 GPIOC bit set/reset register (GPIOC_BSRR)
Address offset: 0x0818
Reset value: 0x0000 0000
31 30 29
BR15 BR14 BR13
rc_w1 rc_w1 rc_w1
15 14 13
BS15 BS14 BS13
rc_w1 rc_w1 rc_w1
Bit 31 BR15: Port PC15 reset output data bit [15] in GPIOC_ODR.
Bit 30 BR14: Port PC14 reset output data bit [14] in GPIOC_ODR.
Bit 29 BR13: Port PC13 reset output data bit [13] in GPIOC_ODR.
Bits 28:23 Reserved, must be kept at reset value.
Bit 22 BR6: Port PC6 reset output data bit [6] in GPIOC_ODR.
Bit 21 BR5: Port PC5 reset output data bit [5] in GPIOC_ODR.
Bit 20 BR4: Port PC4 reset output data bit [4] in GPIOC_ODR.
Bit 19 BR3: Port PC3 reset output data bit [3] in GPIOC_ODR.
Bit 18 BR2: Port PC2 reset output data bit [2] in GPIOC_ODR.
Bit 17 BR1: Port PC1 reset output data bit [1] in GPIOC_ODR.
Bit 16 BR0: Port PC0 reset output data bit [0] in GPIOC_ODR.
Note: If both BS0 and BR0 are set, BS0 has priority.
Bit 15 BS15: Port PC15 set output data bit [15] in GPIOC_ODR.
Bit 14 BS14: Port PC14 set output data bit [14] in GPIOC_ODR.
Bit 13 BS13: Port PC13 set output data bit [13] in GPIOC_ODR.
Bits 12:7 Reserved, must be kept at reset value.
Bit 6 BS6: Port PC6 set output data bit [6] in GPIOC_ODR.
Bit 5 BS5: Port PC5 set output data bit [5] in GPIOC_ODR.
Bit 4 BS4: Port PC4 set output data bit [4] in GPIOC_ODR.
Bit 3 BS3: Port PC3 set output data bit [3] in GPIOC_ODR.
Bit 2 BS2: Port PC2 set output data bit [2] in GPIOC_ODR.
Bit 1 BS1: Port PC1 set output data bit [1] in GPIOC_ODR.
Bit 0 BS0: Port PC0 set output data bit [0] in GPIOC_ODR.
These bits are read clear-write 1. A read to these bits returns the value 0.
28 27 26 25
Res. Res. Res. Res.
12 11 10 9
Res. Res. Res. Res.
These bits are read clear-write 1. A read to these bits returns the value 0.
0: No action on the corresponding GPIOC_ODR.OD0
1: Resets the corresponding GPIOC_ODR.OD0.
0: No action on the corresponding GPIOC_ODR.OD0
1: Sets the corresponding GPIOC_ODR.OD0.
24 23 22
Res. Res. BR6
rc_w1
8 7 6
Res. Res. BS6
rc_w1
RM0453 Rev 2
General-purpose I/Os (GPIO)
21 20 19 18
BR5 BR4 BR3 BR2
rc_w1 rc_w1 rc_w1 rc_w1
5 4 3 2
BS5 BS4 BS3 BS2
rc_w1 rc_w1 rc_w1 rc_w1
17 16
BR1 BR0
rc_w1 rc_w1
1 0
BS1 BS0
rc_w1 rc_w1
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