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RM0453
depending on the privileged control bit of the connected DMA controller channel y, and
considering that the DMAMUX x channel output is connected to the y channel of the DMA
(refer to the DMAMXUX mapping implementation section).
31
30
29
Res.
Res.
Res.
Res.
15
14
13
CSOF
CSOF
Res.
Res.
13
w
Bits 31:14 Reserved, must be kept at reset value.
Bits 13:0 CSOF[13:0]: Clear synchronization overrun event flag
Writing 1 in each bit clears the corresponding overrun flag SOFx in the DMAMUX_CSR
register.
14.6.4
DMAMUX request generator channel x configuration register
(DMAMUX_RGxCR)
Address offset: 0x100 + 0x04 * x (x = 0 to 3)
Reset value: 0x0000 0000
This register shall be written by a non-secure or secure write, according to the secure mode
of the considered DMAMUX request line multiplexer channel y it is assigned to, and
considering that the DMAMUX request generator x channel output is selected by the y
channel of the DMAMUX request line channel (refer to DMAMUX_CyCR.DMAREQ_ID[7:0]
and to the DMAMXUX mapping implementation section).
This register shall be written by an unprivileged or privileged write, according to the
privileged mode of the considered DMAMUX request line multiplexer channel y it is
assigned to, and considering that the DMAMUX request generator x channel output is
selected by the y channel of the DMAMUX request line channel (refer to
DMAMUX_CyCR.DMAREQ_ID[7:0] and to the DMAMXUX mapping implementation
section).
31
30
29
Res.
Res.
Res.
Res.
15
14
13
Res.
Res.
Res.
Res.
Bits 31:24 Reserved, must be kept at reset value.
Bits 23:19 GNBREQ[4:0]: Number of DMA requests to be generated (minus 1)
Defines the number of DMA requests to be generated after a trigger event. The actual
number of generated DMA requests is GNBREQ +1.
Note: This field must be written only when GE bit is disabled.
28
27
26
25
Res.
Res.
Res.
12
11
10
9
CSOF
CSOF
CSOF
12
11
10
9
w
w
w
w
28
27
26
25
Res.
Res.
Res.
12
11
10
9
Res.
Res.
Res.
DMA request multiplexer (DMAMUX)
24
23
22
Res.
Res.
Res.
8
7
6
CSOF
CSOF
CSOF
CSOF
8
7
6
w
w
w
24
23
22
Res.
GNBREQ[4:0]
rw
rw
8
7
6
OIE
Res.
Res.
rw
RM0453 Rev 2
21
20
19
18
Res.
Res.
Res.
Res.
5
4
3
2
CSOF
CSOF
CSOF
5
4
3
2
w
w
w
w
21
20
19
18
GPOL[1:0]
rw
rw
rw
rw
5
4
3
2
Res.
SIG_ID[4:0]
rw
rw
rw
17
16
Res.
Res.
1
0
CSOF
CSOF
1
0
w
w
17
16
GE
rw
rw
1
0
rw
rw
493/1454
497
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