Table 117. Effect Of Low-Power Modes On Dac - ST STM32WL55JC Reference Manual

Advanced arm-based 32-bit mcus with sub-ghz radio solution
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Digital-to-analog converter (DAC)
Stop 0 / Stop 1
Stop 2
Standby
Shutdown
19.6
DAC interrupts
Interrupt
Interrupt
acronym
event
DMA
DAC
underrun
606/1454
Table 117. Effect of low-power modes on DAC (continued)
Mode
The DAC remains active with a static value if the Sample and hold mode is
selected using LSI clock.
The DAC registers content is lost and must be reinitialized after exiting
Stop 2. The DAC must be disabled before entering Stop 2.
The DAC peripheral is powered down and must be reinitialized after exiting
Standby or Shutdown mode.
Table 118. DAC interrupts
Enable
Event flag
control bit
DMAUDRI
1
DMAUDR
Description
Interrupt clear
method
Write
1
E
DMAUDRx = 1
RM0453 Rev 2
Exit Sleep
Exit Stop
mode
mode
Yes
No
RM0453
Exit Standby
mode
No

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