Figure 89. Dac Lfsr Register Calculation Algorithm; Figure 90. Dac Conversion (Sw Trigger Enabled) With Lfsr Wave Generation - ST STM32WL55JC Reference Manual

RM0453
19.4.10 Triangle-wave generation
It is possible to add a small-amplitude triangular waveform on a DC or slowly varying signal.
DAC triangle-wave generation is selected by setting WAVE1[1:0] to 10". The amplitude is
configured through the MAMP1[3:0] bits in the DAC_CR register. An internal triangle
counter is incremented three dac_pclk clock cycles after each trigger event. The value of
this counter is then added to the DAC_DHR1 register without overflow and the sum is
transferred into the DAC_DOR1 register. The triangle counter is incremented as long as it is
less than the maximum amplitude defined by the MAMP1[3:0] bits. Once the configured
amplitude is reached, the counter is decremented down to 0, then incremented again and so
on.
It is possible to reset triangle wave generation by resetting the WAVE1[1:0] bits.
MAMP1[3:0] max amplitude+
DAC_DHR1 base value
Figure 92. DAC conversion (SW trigger enabled) with triangle wave generation
dac_pclk
DHR
DOR
SWTRIG
Note: The DAC trigger must be enabled for triangle wave generation by setting the TEN1 bit in the
DAC_CR register.
The MAMP1[3:0] bits must be configured before enabling the DAC, otherwise they cannot
be changed.
Figure 91. DAC triangle wave generation
DAC_DHR1 base value
0
0xABE
RM0453 Rev 2
Digital-to-analog converter (DAC)
0xABF
0xABE
MSv61371V1
0xAC0
MS45321V1
599/1454
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