Irq Interrupt Commands; Table 37. Irq Bit Mapping And Definition - ST STM32WL55JC Reference Manual

Advanced arm-based 32-bit mcus with sub-ghz radio solution
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Sub-GHz radio (SUBGHZ)
Get_IrqStatus() command
Get_IrqStatus(Status, IrqStatus) returns the IRQ status.
Opcode
byte 0
byte 1
bytes 3:2
Clr_IrqStatus() command
Clr_IrqStatus(ClrIrq) clears the IRQ status flags (IrqStatus[15:0]).
byte 0
bytes 2:1
5.8.7
Miscellaneous commands
Calibrate() command
Calibrate(CalibCfg) allows one or several blocks to be calibrated at any time when in
Standby mode. The blocks to calibrate are defined by CalibCfg parameter. When the
calibration is ongoing, BUSY is set. A falling edge on BUSY indicates the end of all enabled
calibrations.
byte 0
198/1454
0
Status[7:0]
w
bits 7:0 Opcode: 0x12
bits 7:0 Status[7:0]: see
bits 15:0 IrqStatus[15:0]: interrupt pending status information
See
Table 37
0: IRQ not pending
1: IRQ pending
0
Opcode
w
bits 7:0 Opcode: 0x02
bits 15:0 ClrIrq[15:0]: Clear interrupt status
See
Table 37
0: no action
1: IRQ pending status flag cleared
0
Opcode
w
bits 7:0 Opcode: 0x89
1
r
Get_Status() command
for interrupt bit map definition. For each bit:
1
w
for interrupt bit map definition. For each bit:
RM0453 Rev 2
2
IrqStatus[15:0]
r
2
ClrIrq[15:0]
w
1
CalibCfg[7:0]
w
RM0453
3
r

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