Table 175. Pka Register Map And Reset Values - ST STM32WL55JC Reference Manual

Advanced arm-based 32-bit mcus with sub-ghz radio solution
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RM0453
25.2
TIM1 main features
TIM1 timer features include:
16-bit up, down, up/down auto-reload counter.
16-bit programmable prescaler allowing dividing (also "on the fly") the counter clock
frequency either by any factor between 1 and 65536.
Up to 6 independent channels for:
Complementary outputs with programmable dead-time
Synchronization circuit to control the timer with external signals and to interconnect
several timers together.
Repetition counter to update the timer registers only after a given number of cycles of
the counter.
2 break inputs to put the timer's output signals in a safe user selectable configuration.
Interrupt/DMA generation on the following events:
Supports incremental (quadrature) encoder and Hall-sensor circuitry for positioning
purposes
Trigger input for external clock or cycle-by-cycle current management
Input Capture (but channels 5 and 6)
Output Compare
PWM generation (Edge and Center-aligned Mode)
One-pulse mode output
Update: counter overflow/underflow, counter initialization (by software or
internal/external trigger)
Trigger event (counter start, stop, initialization or count by internal/external trigger)
Input capture
Output compare
RM0453 Rev 2
Advanced-control timer (TIM1)
723/1454
822

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