Figure 45. Input Floating/Pull-Up/Pull-Down Configurations - ST STM32WL55JC Reference Manual

RM0453
10.4.9 GPIOx alternate function low register (GPIOx_AFRL) (x = A to B)
Address offset: Block A: 0x0020
Address offset: Block B: 0x0420
Reset value: 0x0000 0000
31 30 29
AFSEL7[3:0]
rw rw rw
15 14 13
AFSEL3[3:0]
rw rw rw
Bits 31:28 AFSEL7[3:0]: Port Px7 alternate function selection
Bits 27:24 AFSEL6[3:0]: Port Px6 alternate function selection
Bits 23:20 AFSEL5[3:0]: Port Px5 alternate function selection
Bits 19:16 AFSEL4[3:0]: Port Px4 alternate function selection
Bits 15:12 AFSEL3[3:0]: Port Px3 alternate function selection
Bits 11:8 AFSEL2[3:0]: Port Px2 alternate function selection
Bits 7:4 AFSEL1[3:0]: Port Px1 alternate function selection
Bits 3:0 AFSEL0[3:0]: Port Px0 alternate function selection
These bits are written by software to configure alternate function I/Os
0x0: AF0 selected
0x1: AF1 selected
0x2: AF2 selected
...
0xE: AF14 selected
0xF: AF15 selected
10.4.10 GPIOx alternate function high register (GPIOx_AFRH) (x = A to B)
Address offset: Block A: 0x0024
Address offset: Block B: 0x0424
Reset value: 0x0000 0000
31 30 29
AFSEL15[3:0]
rw rw rw
15 14 13
AFSEL11[3:0]
rw rw rw
Bits 31:28 AFSEL15[3:0]: Port Px15 alternate function selection
Bits 27:24 AFSEL14[3:0]: Port Px14 alternate function selection
Bits 23:20 AFSEL13[3:0]: Port Px13 alternate function selection
28 27 26 25
AFSEL6[3:0]
rw rw rw rw
12 11 10 9
AFSEL2[3:0]
rw rw rw rw
28 27 26 25
AFSEL14[3:0]
rw rw rw rw
12 11 10 9
AFSEL10[3:0]
rw rw rw rw
24 23 22
AFSEL5[3:0]
rw rw rw
8 7 6
AFSEL1[3:0]
rw rw rw
24 23 22
AFSEL13[3:0]
rw rw rw
8 7 6
AFSEL9[3:0]
rw rw rw
RM0453 Rev 2
General-purpose I/Os (GPIO)
21 20 19 18
AFSEL4[3:0]
rw rw rw rw
5 4 3 2
AFSEL0[3:0]
rw rw rw rw
21 20 19 18
AFSEL12[3:0]
rw rw rw rw
5 4 3 2
AFSEL8[3:0]
rw rw rw rw
17 16
rw rw
1 0
rw rw
17 16
rw rw
1 0
rw rw
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