ST STM32WL55JC Reference Manual page 601

RM0453
The timings for the three phases above are in units of LSI clock periods. As an example, to
configure a sample time of 350 µs, a hold time of 2 ms and a refresh time of 100 µs
assuming LSI ~32 KHz is selected:
12 cycles are required for sample phase: TSAMPLE1[9:0] = 11,
62 cycles are required for hold phase: THOLD1[9:0] = 62,
and 4 cycles are required for refresh period: TREFRESH1[7:0] = 4.
In this example, the power consumption is reduced by almost a factor of 15 versus Normal
modes.
The formulas to compute the right sample and refresh timings are described in the table
below, the Hold time depends on the leakage current.
Buffer
State
Enable
Disable
1. In the above formula the settling to the desired code value with ½ LSB or accuracy requires 10 constant
time for 12 bits resolution. For 8 bits resolution, the settling time is 7 constant time.
2. C is the capacitor in Sample and hold mode.
SH
3. The tolerated voltage drop during the hold phase "Vd" is represented by the number of LSBs after the
capacitor discharging with the output leakage current. The settling back to the desired value with ½ LSB
error accuracy requires ln(2*Nlsb) constant time of the DAC.
Example of the sample and refresh time calculation with output buffer on
The values used in the example below are provided as indication only. Please refer to the
product datasheet for product data.
C = 100 nF
SH
V = 3.0 V
DD
Sampling phase:
t
SAMP
(where R
Refresh phase:
t
REFRESH
(where N
Hold phase:
D = i
v
i
leak
t
hold
Table 115. Sample and refresh timings
(1)(2)
t
SAMP
7 μs + (10*R
BON
3 μs + (10*R
BOFF
= 7 μs + (10 * 2000 * 100 * 10
= 2 kΩ)
BON
= 7 μs + (2000 * 100 * 10
= 10 (10 LSB drop during the hold phase)
LSB
* t / C = 0.0073 V (10 LSB of 12bit at 3 V)
leak hold SH
= 150 nA (worst case on the IO leakage on all the temperature range)
-9
= 0.0073 * 100 * 10
*C )
SH
*C )
SH
-9
) = 2.007 ms
-9
) * ln(2*10) = 606.1 μs
-9
/ (150 * 10 ) = 4.867 ms
RM0453 Rev 2
Digital-to-analog converter (DAC)
t
(2)(3)
REFRESH
7 μs + (R *C )*ln(2*N
BON SH
3 μs + (R *C )*ln(2*N
BOFF SH
)
LSB
)
LSB
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