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Low-power timer (LPTIM)
28.7.6
LPTIM compare register (LPTIM_CMP)
Address offset: 0x014
Reset value: 0x0000 0000
31
30
29
Res.
Res.
Res.
Res.
15
14
13
rw
rw
rw
Bits 31:16 Reserved, must be kept at reset value.
Bits 15:0 CMP[15:0]: Compare value
CMP is the compare value used by the LPTIM.
Caution:
The LPTIM_CMP register must only be modified when the LPTIM is enabled (ENABLE bit
set to '1').
28.7.7
LPTIM autoreload register (LPTIM_ARR)
Address offset: 0x018
Reset value: 0x0000 0001
31
30
29
Res.
Res.
Res.
Res.
15
14
13
rw
rw
rw
Bits 31:16 Reserved, must be kept at reset value.
Bits 15:0 ARR[15:0]: Auto reload value
ARR is the autoreload value for the LPTIM.
This value must be strictly greater than the CMP[15:0] value.
Caution:
The LPTIM_ARR register must only be modified when the LPTIM is enabled (ENABLE bit
set to '1').
968/1454
28
27
26
25
Res.
Res.
Res.
12
11
10
9
rw
rw
rw
rw
28
27
26
25
Res.
Res.
Res.
12
11
10
9
rw
rw
rw
rw
24
23
22
Res.
Res.
Res.
8
7
6
CMP[15:0]
rw
rw
rw
24
23
22
Res.
Res.
Res.
8
7
6
ARR[15:0]
rw
rw
rw
RM0453 Rev 2
21
20
19
18
Res.
Res.
Res.
Res.
5
4
3
2
rw
rw
rw
rw
21
20
19
18
Res.
Res.
Res.
Res.
5
4
3
2
rw
rw
rw
rw
RM0453
17
16
Res.
Res.
1
0
rw
rw
17
16
Res.
Res.
1
0
rw
rw
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