ST STM32WL55JC Reference Manual page 983

RM0453
30.4.6 IWDG register map
The following table gives the IWDG register map and reset values.
Register
Offset
name
IWDG_KR
0x00
Reset value
IWDG_PR
0x04
Reset value
IWDG_RLR
0x08
Reset value
IWDG_SR
0x0C
Reset value
IWDG_WINR
0x10
Reset value
Refer to
Table 204. IWDG register map and reset values
Section 2.6 on page 70
0 0
for the register boundary addresses.
RM0453 Rev 2
Independent watchdog (IWDG)
KEY[15:0]
0 0 0 0 0 0 0 0 0
RL[11:0]
1 1 1 1 1 1 1
WIN[11:0]
1 1 1 1 1 1 1
0 0 0 0 0
PR[2:0]
0 0 0
1 1 1 1 1
0 0 0
1 1 1 1 1
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