Figure 238. Counter Timing Diagram With Prescaler Division Change From 1 To 2; Figure 239. Counter Timing Diagram With Prescaler Division Change From 1 To 4 - ST STM32WL55JC Reference Manual

Advanced arm-based 32-bit mcus with sub-ghz radio solution
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RM0453
Timerclock = CK_CNT
Counter register
Counter overflow
Update event (UEV)
Update interrupt flag
Timerclock = CK_CNT
Counter register
Counter overflow
Update event (UEV)
Update interrupt flag
Figure 240. Counter timing diagram, internal clock divided by 1
CK_PSC
CNT_EN
31
(UIF)
Figure 241. Counter timing diagram, internal clock divided by 2
CK_PSC
CNT_EN
0034
(UIF)
RM0453 Rev 2
General-purpose timers (TIM16/TIM17)
32
33
34 35 36
00
0036
0035
01
02
03
04
05
0000
0002
0001
06
07
MS31078V2
0003
MS31079V2
899/1454
944

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