ST STM32WL55JC Reference Manual page 451

RM0453
12.3.11 From system errors to timers (TIM1/TIM16/TIM17)
Purpose
CSS, CPU hard fault, RAM parity error, FLASH ECC double error detection and PVD can
generate system errors in the form of timer break toward timers (TIM1/TIM16/TIM17).
The purpose of the break function is to protect power switches driven by PWM signals
generated by the timers.
List of possible source of break are described in the following sections:
•
Section 25.3.16: Using the break function
• Section 27.3.11: Using the break function
Active power modes
Run, Sleep, LPRun, LPSleep
12.3.12 From timers (TIM16/TIM17) to IRTIM
Purpose
General-purpose timer (TIM16/TIM17) output channels TIMx_OC1 are used to generate the
waveform of infrared signal output.
The functionality is described in
Active power modes
Run, Sleep, LPRun, LPSleep
12.3.13 From timer (LPTIM1/LPTIM2/LPTIM3/GPIO pin EXTI)
to DMAMUX1 trigger
Purpose
Low-power timers LPTIM1/LPTIM2/LPTIM3 and GPIO pin EXTI mux in SYSCFG, can be
used to generate a DMAMUX1 trigger event.
GPIO pin EXTI mux is described in
DMAMUX1 triggering is described in
Triggering signals
The output from low-power timer is on signals LPTIMx_OUT event. The output from GPIO
pin is on EXTI mux signal from SYSCFG.
The input to DMAMUX1 is on signals trigger input [20:0].
The connection between timers, GPIO pin EXTI mux and DMAMUX1, is provided in
Table 83: DMAMUX1: assignment of multiplexer inputs to
Active power modes
Run, Sleep, LPRun, LPSleep
(TIM1)
(TIM16/TIM17)
Section 29: Infrared interface
Section 11: System configuration controller
Section 14.3.2: DMAMUX1
RM0453 Rev 2
Peripherals interconnect matrix
(IRTIM).
mapping.
resources.
(SYSCFG).
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