ST STM32WL55JC Reference Manual page 423

RM0453
Table 71. GPIOA register map and reset values (continued)
Offset Register name
GPIOA_BSRR
0x0018
Reset value
GPIOA_LCKR
0x001C
Reset value
GPIOA_AFRL
0x0020
Reset value
GPIOA_AFRH
0x0024
Reset value
GPIOA_BRR
0x0028
Reset value
Refer to
10.4.34 GPIOB register map
The following table gives the GPIOB register map and reset values.
Offset Register name
GPIOB_MODER
0x0400
Reset value
GPIOB_OTYPER
0x0404
Reset value
GPIOB_OSPEEDR
0x0408
Reset value
GPIOB_PUPDR
0x040C
Reset value
GPIOB_IDR
0x0410
Reset value
GPIOB_ODR
0x0414
Reset value
GPIOB_BSRR
0x0418
Reset value
0 0 0 0 0 0 0 0
AFSEL7[3:0] AFSEL6[3:0] AFSEL5[3:0] AFSEL4[3:0] AFSEL3[3:0] AFSEL2[3:0] AFSEL1[3:0] AFSEL0[3:0]
0 0 0 0 0 0 0 0
AFSEL15[3:0] AFSEL14[3:0] AFSEL13[3:0] AFSEL12[3:0] AFSEL11[3:0] AFSEL10[3:0] AFSEL9[3:0] AFSEL8[3:0]
0 0 0 0 0 0 0 0
Section 2.6: Memory organization
Table 72. GPIOB register map and reset values
1 1 1 1 1 1 1 1
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0
for the register boundary addresses.
1 1 1 1 1 1 1 1 1
0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
x
0
0 0 0 0 0 0 0 0 0
RM0453 Rev 2
General-purpose I/Os (GPIO)
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
1 1 1 1 1 1 0 1 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 1 1
0 0 0 0 0 0 1 0 0
x x x x x x x x x
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
1 1 1 1 1 1
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
x x x x x x
0 0 0 0 0 0
0 0 0 0 0 0
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