ST STM32WL55JC Reference Manual page 424

General-purpose I/Os (GPIO)
Table 72. GPIOB register map and reset values (continued)
Offset Register name
GPIOB_LCKR
0x041C
Reset value
GPIOB_AFRL
0x0420
Reset value
GPIOB_AFRH
0x0424
Reset value
GPIOB_BRR
0x0428
Reset value
Refer to
10.4.35 GPIOC register map
The following table gives the GPIOC register map and reset values.
Offset Register name
GPIOC_MODER
0x0800
Reset value
GPIOC_OTYPER
0x0804
Reset value
GPIOC_OSPEEDR
0x0808
Reset value
GPIOC_PUPDR
0x080C
Reset value
GPIOC_IDR
0x0810
Reset value
GPIOC_ODR
0x0814
Reset value
GPIOC_BSRR
0x0818
Reset value
GPIOC_LCKR
0x081C
Reset value
424/1454
AFSEL7[3:0] AFSEL6[3:0] AFSEL5[3:0] AFSEL4[3:0] AFSEL3[3:0] AFSEL2[3:0] AFSEL1[3:0] AFSEL0[3:0]
0 0 0 0 0 0 0 0
AFSEL15[3:0] AFSEL14[3:0] AFSEL13[3:0] AFSEL12[3:0] AFSEL11[3:0] AFSEL10[3:0] AFSEL9[3:0] AFSEL8[3:0]
0 0 0 0 0 0 0 0
Section 2.6: Memory organization
Table 73. GPIOC register map and reset values
1 1 1 1 1 1
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0
0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0
for the register boundary addresses.
0
x
0
0 0 0 0 0 0 0 0
0 0
RM0453 Rev 2
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
1 1 1 1 1 1 1 1
0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
x x x
0 0 0
0 0 0
0 0 0
RM0453
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
1 1 1 1 1 1
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
x x x x x x
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0