Figure 69. Single Conversions Of A Sequence, Hardware Trigger; Figure 70. Continuous Conversions Of A Sequence, Hardware Trigger - ST STM32WL55JC Reference Manual

Analog-to-digital converter (ADC)
When an overrun condition occurs, the ADC keeps operating and can continue to convert
unless the software decides to stop and reset the sequence by setting the ADSTP bit in the
ADC_CR register.
The OVR flag is cleared by software by writing 1 to it.
It is possible to configure if the data is preserved or overwritten when an overrun event
occurs by programming the OVRMOD bit in the ADC_CFGR1 register:
•
OVRMOD = 0
–
•
OVRMOD = 1
–
(1)
ADSTART
EOC
EOS
OVR
ADSTP
(1)
TRGx
(2)
ADC state
ADC_DR read
access
ADC_DR
(OVRMOD=0)
ADC_DR
(OVRMOD=1)
by S/W
triggered
552/1454
An overrun event preserves the data register from being overwritten: the old data
is maintained and the new conversion is discarded. If OVR remains at 1, further
conversions can be performed but the resulting data is discarded.
The data register is overwritten with the last conversion result and the previous
unread data is lost. If OVR remains at 1, further conversions can be performed
and the ADC_DR register always contains the data from the latest conversion.
Figure 72. Example of overrun (OVR)
RDY CH0 CH1
D0
D0
by H/W
CH2 CH0 CH1 CH2
OVERRUN
D1 D2 D0
D1 D2 D0
RM0453 Rev 2
CH0 STOP
D1 D2
RM0453
RDY
MSv30343V3