ST STM32WL55JC Reference Manual page 534

Analog-to-digital converter (ADC)
Internal signal
name
V
IN
TRGx
V
V
REFINT
V
BAT/3
dac_out1
ADC_AWDx_OUT
Name
TRG0
TRG1
TRG2
TRG3
TRG4
TRG5
TRG6
TRG7
18.3.2 ADC voltage regulator (ADVREGEN)
The ADC has a specific internal voltage regulator which must be enabled and stable before
using the ADC.
The ADC internal voltage regulator can be enabled by setting ADVREGEN bit to 1 in the
ADC_CR register. The software must wait for the ADC voltage regulator startup time
(t
ADCVREG_SETUP
managed by software (for details on t
After ADC operations are complete, the ADC is disabled (ADEN = 0). To keep power
consumption low, it is important to disable the ADC voltage regulator before entering low-
power mode (LPRun, LPSleep or Stop mode). Refer to
disable sequence).
Note: When the internal voltage regulator is disabled, the internal analog calibration is kept.
Analog reference from the power control unit
The internal ADC voltage regulator internally uses an analog reference delivered by the
power control unit through a buffer. This buffer is always enabled when the main voltage
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Table 101. ADC internal input/output signals
Signal type
Analog Input
[x]
channels
Input
Input
TS
Input
Input
Input
Output
TIM1_TRGO2
TIM1_CC4
TIM2_TRGO
TIM2_CH4
Reserved
TIM2_CH3
Reserved
EXTI11
) before launching a calibration or enabling the ADC. This delay must be
Connected either to internal channels or to ADC_INi
external channels
ADC conversion triggers
Internal temperature sensor output voltage
Internal voltage reference output voltage
VBAT pin input voltage divided by 3
DAC internal channel1 input
Internal analog watchdog output signal connected to on-
chip timers (x = Analog watchdog number = 1,2,3)
Table 102. External triggers
Source
ADCVREG_SETUP
RM0453 Rev 2
Description
EXTSEL[2:0]
000
001
010
011
100
101
110
111
, refer to the device datasheet).
Section : ADC voltage regulator
RM0453