Table 176. Behavior Of Timer Outputs Versus Brk/Brk2 Inputs; Figure 173. Pwm Output State Following Brk And Brk2 Pins Assertion (Ossi=1) - ST STM32WL55JC Reference Manual

Advanced-control timer (TIM1)
Arming and re-arming break circuitry
The break circuitry (in input or bidirectional mode) is armed by default (peripheral reset
configuration).
The following procedure must be followed to re-arm the protection after a break (break2)
event:
•
The BKDSRM (BK2DSRM) bit must be set to release the output control
• The software must wait until the system break condition disappears (if any) and clear
the SBIF status flag (or clear it systematically before re-arming)
•
The software must poll the BKDSRM (BK2DSRM) bit until it is cleared by hardware
(when the application break condition disappears)
From this point, the break circuitry is armed and active, and the MOE bit can be set to re-
enable the PWM outputs.
Other break inputs
Bidirectional
Break I/O
766/1454
Table 177. Break protection disarming conditions
MOE
(BK2DIR)
0
0
0
1
Figure 175. Output redirection (BRK2 request not represented)
Peripheral
break sources
AF input
AF
(active low)
controller
AF output
(open drain)
Vss
BKDIR
(BK2DSRM)
0
1
1
X
System break request
BKF[3:0]
Filter
BKIN inputs from
AF controller
Bidirectional
mode control logic
MOE BKBID BKBDSRM
RM0453 Rev 2
BKDSRM
Break protection state
X
0
1
X
SBIF flag
Software break
requests: BG
BKE
BKP
Application break requests
System break request
BRK request
RM0453
Armed
Armed
Disarmed
Armed
BIF flag
BRK
request
MSv42028V2