ST STM32WL55JC Reference Manual page 904

Advanced arm-based 32-bit mcus with sub-ghz radio solution
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General-purpose timers (TIM16/TIM17)
Figure 247
without prescaler.
Figure 247. Control circuit in normal mode, internal clock divided by 1
CEN=CNT_EN
Counter clock = CK_CNT = CK_PSC
Counter register
External clock source mode 1
This mode is selected when SMS=111 in the TIMx_SMCR register. The counter can count at
each rising or falling edge on a selected input.
TI2[0]
Filter
TI2[1..15]
ICF[3:0]
TIMx_CCMR1
For example, to configure the upcounter to count in response to a rising edge on the TI2
input, use the following procedure:
904/1454
shows the behavior of the control circuit and the upcounter in normal mode,
Internal clock
UG
CNT_INIT
31
Figure 248. TI2 external clock connection example
TI2F_Rising
Edge
detector
TI2F_Falling
CC2P
TIMx_CCER
3 2
33 34
35 36
TIMx_SMCR
TS[4:0]
ITRx
000xx
TI1_ED
00100
TI1FP1
00101
0
TI2FP2
00110
1
(internal clock)
RM0453 Rev 2
00
01
02
03 04 05
TRGI
External clock
mode 1
CK_INT
Internal clock
mode
SMS[2:0]
TIMx_SMCR
RM0453
06
07
MS31085V2
CK_PSC
MSv40935V1

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