ST STM32WL55JC Reference Manual page 634

Advanced arm-based 32-bit mcus with sub-ghz radio solution
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True random number generator (RNG)
22.3
RNG functional description
22.3.1
RNG block diagram
Figure 98
rng_it
rng_hclk
rng_clk
22.3.2
RNG internal signals
Table 129
at the STM32 product level (on pads).
Signal name
634/1454
shows the RNG block diagram.
Figure 98. RNG block diagram
Banked Registers
control
data
AHB
status
interface
AHB clock domain
RNG clock domain
describes a list of useful-to-know internal signals available at the RNG level, not
Table 129. RNG internal input/output signals
Signal type
rng_it
Digital output
rng_hclk
Digital input
rng_clk
Digital input
CONDRST
RNG_CR
RNG_DR
RNG_SR
Fault detection
Clock checker
Health tests
en_osc
RNG global interrupt request
AHB clock
RNG dedicated clock, asynchronous to rng_hclk
RM0453 Rev 2
True RNG
Conditioning logic
1-bit
Post-processing (optional)
Sampling (x N) + XOR
Analog
Analog
Analog
...
noise
noise
noise
source 1
source 2
source N
Analog noise source
Description
RM0453
MSv42098V2

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