ST STM32WL55JC Reference Manual page 487

RM0453
Figure 51. Synchronization mode of the DMAMUX request line multiplexer channel
dmamux_syncx
dmamux_req_outx
DMA request counter
Example: DMAMUX_CCRx configured with: NBREQ=4, SE=1, EGE=1, SPOL=01 (rising edge)
Figure 52. Event generation of the DMA request line multiplexer channel
dmamux_req_outx
DMA request counter
Example with: DMAMUX_CCRx configured with: NBREQ=3, SE=0, EGE=1
If EGE is enabled, the multiplexer channel generates a channel event, as a pulse of one
AHB clock cycle, when its DMA request counter is automatically reloaded with the value of
the programmed NBREQ field, as shown in
Selected
dmamux_reqx
dmamux_evtx
Synchronization event
Input DMA request line connected to output
Selected
dmamux_reqx
SE
EGE
dmamux_evtx
Selected DMA request line transferred to the output
DMA requests served
4 3 2
Input DMA request line disconnected from output
Selected DMA request line transferred to the output
3 2 1 0 3
DMA request counter reaches zero
Event is generated on the output
DMA request counter auto-reloads with NBREQ value
Figure 51
RM0453 Rev 2
DMA request multiplexer (DMAMUX)
DMA request pending
Not pending
1 0
DMA request counter underrun
DMA request counter auto-reload to NBREQ
2 1 0 3 2 1
and Figure 52.
4
MSv41974V1
DMA request pending
Not pending
0
MSv41975V1
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