Global Security Controller (Gtzc); Gtzc Introduction; Gtzc Main Features; Gtzc Security System Architecture - ST STM32WL55JC Reference Manual

Advanced arm-based 32-bit mcus with sub-ghz radio solution
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RM0453
(from option byte)
3.4.2
GTZC internal signals
Internal signal name
AHB
ESE
tzsc_periph[n]_sec
tzsc_mpcmw[n]_sec
tzsc_periph[n]_sec
tzsc_periph[n]_priv
tzsc_mpcmw[n]_priv
tzsc_ila_event
tzic_ila_event
ila_events
tzic_ila_it
3.4.3
Illegal access definition
The existing types of illegal access are listed below:
Illegal non-secure read write access
Any non-secure read write transaction trying to access a secure resource is considered
as illegal. The addressed resource generates an illegal access event for illegal read
/write access.
Figure 5. GTZC block diagram
(from option bytes)
ESE
AHB
tzsc_periph[n]_ sec
tzsc_mpcwm[n]_ sec
AHB
n x ila_event
(from peripherals)
Table 5. GTZC internal signals
Signal type
Input/output
Input
Input
Input
Output
Output
Output
Output
Output
Input
Output
RM0453 Rev 2

Global security controller (GTZC)

GTZC
TZSC
SECCFGR
PRIVCFGR
MPCWMR
tzsc_ila_event
TZIC
IER
MISR
ICR
tzic_ila_event
Description
AHB slaves TZSC and TZIC register access ports
Security enable from user option ESE
TZSC peripheral [n] security control from User option
TZSC MPCWM [n] security control from User option
TZSC peripheral [n] security control
TZSC peripheral [n] privileged control
TZSC internal memories MPCWM [n] privileged control
TZSC illegal access event
TZIC illegal access event
Peripheral illegal access events
TZIC illegal access interrupt
tzsc_periph[n]_sec
tzsc_periph[n]_priv
tzsc_mpcwm[n]_priv
tzic_ila_it
MSv60799V1
79/1454
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