ST STM32WL55JC Reference Manual page 361

Advanced arm-based 32-bit mcus with sub-ghz radio solution
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RM0453
Off-
Register
set
RCC_C2
AHB1ENR
0x148
Reset value
RCC_C2
AHB2ENR
0x14C
Reset value
RCC_C2
AHB3ENR
0x150
Reset value
0x154
Reserved
RCC_C2
APB1ENR1
0x158
0
Reset value
RCC_C2
APB1ENR2
0x15C
Reset value
RCC_C2
APB2ENR
0x160
Reset value
RCC_C2
APB3ENR
0x164
Reset value
Table 63. RCC register map and reset values (continued)
1
0
0 0 0
0 1 0 0 0
Reserved
0
0
0 0
0
RM0453 Rev 2
Reset and clock control (RCC)
0
0
0
0 0
0 0
0
0 0 0
0 0 0
0
0
0
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