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R8C/18 Group, R8C/19 Group
14.1.3
Event Counter Mode
In event counter mode, external signal inputs to the INT1/CNTR0 pin are counted (refer to Table 14.4
Event Counter Mode Specifications). Figure 14.6 shows the TXMR Register in Event Counter
Mode.
Table 14.4
Event Counter Mode Specifications
Item
Count source
Count operations
Divided ratio
Count start condition
Count stop condition
Interrupt request
generation timing
INT10/CNTR00,
INT11/CNTR01
pin functions
CNTR0 pin function
Read from timer
Write to timer
Select functions
Timer X Mode Register
b7 b6 b5 b4
b3 b2
b1
b0
0 0 0 0
1
0
NOTES:
1.
The IR bit in the INT1IC register may be set to 1 (requests interrupt) w hen the R0EDG bit is rew ritten.
Refer to 12.5.5 Changing Interrupt Sources.
2.
Refer to 14.1.6 Notes on Tim er X for precautions regarding the TXS bit.
Figure 14.6
TXMR Register in Event Counter Mode
Rev.1.30
Apr 14, 2006
REJ09B0222-0130
External signal which is input to CNTR0 pin (Active edge is selectable by software)
• Decrement
• When the timer underflows, the contents of the reload register are reloaded and the
count is continued.
1/(n+1)(m+1) n: value set in PREX register, m: value set in TX register
1 (count starts) is written to the TXS bit in the TXMR register.
0 (count stops) is written to the TXS bit in the TXMR register.
When timer X underflows [timer X interrupt].
Count source input (INT1 interrupt input)
Programmable I/O port
The count value can be read out by reading registers TX and PREX.
• When registers TX and PREX are written while the count is stopped, values are written to
both the reload register and counter.
• When registers TX and PREX are written during the count, the value is written to each
reload register of registers TX and PREX at the following count source input, the data is
transferred to the counter at the second count source input, and the count re-starts at the
third count source input.
• INT1/CNTR0 signal polarity switch function
The R0EDG bit can select the active edge of the count source.
• Count source input pin select function
The CNTRSEL bit in the UCON register can select the CNTR00 or CNTR01 pin.
Symbol
Address
008Bh
TXMR
Bit Symbol
Bit Name
TXMOD0
Operating mode select bits 0, 1
TXMOD1
_____
INT1
/CNTR0 signal
R0EDG
polarity sw itch bit
Timer X count start flag
TXS
TXOCNT
Set to 0 in event counter mode.
TXMOD2
Set to 0 in event counter mode.
TXEDG
Set to 0 in event counter mode.
TXUND
Set to 0 in event counter mode.
Page 109 of 233
Specification
b1 b0
1 0 : Event counter mode
0 : Rising edge
1 : Falling edge
(1)
(2)
0 : Stops counting.
1 : Starts counting.
14. Timers
After Reset
00h
Function
RW
RW
RW
RW
RW
RW
RW
RW
RW
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