Xilinx Zynq-7000 User Manual page 655

Creating 7 Series FPGA Multicontroller Block Design
Memory Selection
Memory interface selection is different for a multicontroller design compared with a single
controller design. Select the number of controllers for each memory interface on the
Memory Selection page
X-Ref Target - Figure 5-15
Zynq-7000 AP SoC and 7 Series FPGAs MIS v4.1
UG586 November 30, 2016
(Figure 5-15).
Figure 5-15: Memory Selection Page
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Chapter 5: Multicontroller Design
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