XTP176 (Draft) February 15, 2012 NOTICE: This pre-release document contains confidential and proprietary information of Xilinx, Inc. and is being disclosed to you as a participant in an early access program, under obligation of confidentiality. You may print one (1) copy of this document for evaluation purposes.
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(including loss of data, profits, goodwill, or any type of loss or damage suffered as a result of any action brought by a third party) even if such damage or loss was reasonably foreseeable or Xilinx had been advised of the possibility of the same.
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33 Device Security 33.1 Introduction The Zynq-7000 devices support the ability to perform a secure boot to load encrypted PS images and PL bitstreams. 33.1.1 Terminology In order to reduce confusion, the following terminology will be used in this chapter:...
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33.2 Master Secure Boot The Master Secure Boot mode is the only secure boot mode that Zynq-7000 supports. It uses the hardened AES de- cryption engine and the hardened HMAC authentication engine within the PL to decrypt the encrypted image. The boot process and data flow for the Master Secure Boot mode are shown in Figure 1.
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XILINX CONFIDENTIAL — DISCLOSED UNDER NDA 33.2.1 External Boot Devices Zynq-7000 secure boot mode is restricted to NOR, NAND, or Quad SPI FLASH as the external boot device. A secure boot from JTAG or any other external interface is not allowed.
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There cannot be a mix of encrypted and non-encrypted partitions in a boot image. 33.2.3 eFuse Settings The Zynq-7000 secure boot features can also be controlled via three PL eFuse bits that are described in Table 2. Table 2 eFuse Settings Summary...
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Chapter 32: Device Security XILINX CONFIDENTIAL — DISCLOSED UNDER NDA 33.3.3 HMAC Signature The authentication method requires a signature that must also be supplied to the bootgen software. This signature is not loaded into the PL directly via JTAG like the AES key. It is contained and protected by the encrypted boot image and the encrypted bitstream.
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Chapter 32: Device Security XILINX CONFIDENTIAL — DISCLOSED UNDER NDA The PS DAP controller can be permanently bypassed using the “JTAG CHAIN DISABLE” eFuse. The JTAG access to the PL can be disabled by setting the DISABLE_JTAG configuration option when creating the PL bitstream see UG628, Command Line Tools User Guide for more information.
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