Xilinx Zynq-7000 User Manual page 585

Table 4-20: Native Interface Maintenance Command Signals (Cont'd)
Signal Direction
app_zq_req Input
app_zq_ack Output
app_ref_req
When asserted, this active-High input requests that the Memory Controller send a refresh
command to the DRAM. It must be pulsed for a single cycle to make the request and then
deasserted at least until the app_ref_ack signal is asserted to acknowledge the request
and indicate that it has been sent.
app_ref_ack
When asserted, this active-High input acknowledges a refresh request and indicates that
the command has been sent from the Memory Controller to the PHY.
app_zq_req
When asserted, this active-High input requests that the Memory Controller send a ZQ
calibration command to the DRAM. It must be pulsed for a single cycle to make the request
and then deasserted at least until the app_zq_ack signal is asserted to acknowledge the
request and indicate that it has been sent.
app_zq_ack
When asserted, this active-High input acknowledges a ZQ calibration request and indicates
that the command has been sent from the Memory Controller to the PHY.
Clocking Architecture
The PHY design requires that a MMCM module be used to generate various clocks, and
both global and local clock networks are used to distribute the clock throughout the design.
The PHY also requires one PLL in the same bank as the PLL. This MMCM compensates for
the insertion delay of the BUFG to the PHY.
The clock generation and distribution circuitry and networks drive blocks within the PHY
that can be divided roughly into four separate, general functions:
• Internal (FPGA) logic
• Write path (output) I/O logic
• Read path (input) and delay I/O logic
• IDELAY reference clock (200 MHz)
Zynq-7000 AP SoC and 7 Series FPGAs MIS v4.1
UG586 November 30, 2016
Chapter 4: LPDDR2 SDRAM Memory Interface Solution
Description
This active-High input requests that a ZQ calibration command be issued to
the DRAM.
This active-High output indicates that the Memory Controller has sent the
requested ZQ calibration command to the PHY interface.
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